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The low-cost RTWCG SiOX antireflection coating (ARC) technology increases the efficiency of c-Si, and mc-Si solar cells by up to 30% or
more. This is due to the three factors below:
1. Surface Passivation and Reflectivity:
The RTWCG antireflection film's surface passivation is comparable or
better to many other antireflection films used for antireflection
coatings, such as TiO films. The
reflectivity of the RTWCG antireflection coating is lower than that of any other
antireflection coating,
including some two- and three-layer antireflection coatings.
2. Selective Emitter:
(a)
Introduction:
In order to gain the full benefit of improved emitter
surface passivation on cell performance, it is necessary to tailor the
emitter doping profile so that the emitter is lightly doped between the
gridlines, yet heavily doped under them. This is especially true for
screen-printed gridlines, which require very heavy doping beneath them
for acceptably low contact resistance.
(b) Competition:
The idea of a selective emitter for high efficiency solar cells is
hardly new, in fact it's close to 30 years old. However, in as far as is
known, no other selective emitter (SE) manufacturing approach has been compatible with the
large-scale fabrication of low cost solar cells. Nevertheless, all high efficiency
Si cells (above 20%) have the SE incorporated into the cell design. For
example, the laser grooved technique for fabricating cells using the SE
concept, was developed by Martin Green's group in Australia (the "PERL"
cell), and has
produced the record high Si solar cells efficiency (close to 25%).
However, according to Green the costs of their cells are "about 10 times
more expensive than their weight equivalent in gold." Hence, these cells
are cost prohibitive even for space applications.
The selectively patterned emitter doping profile needed to fabricate
SE's, has historically been obtained by using expensive
photolithographic or screen-printed alignment techniques and multiple
high-temperature diffusion steps (see references below). Most recently,
Ruby et al have patented a simplified self-aligned emitter etch back
technique, first described by Spectrolab (see patent references below).
Their technique (like many other techniques
developed before them) uses a high plasma density source to
etch back the portion of the cell's surface areas between the grid
lines. Our concerns with this technique are:
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cost prohibitive, due to the need of high intensity plasma that can
only be sustained in a high vacuum environment;
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part of the grid lines are etched off along with the cell's
surface areas between the grid lines, resulting in metal deposition in
spaces between the grid lines which increases series resistance and surface
recombination;
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because
the resulting etched surfaces are not smooth and preferential deeper etching
occurs at defect areas, the shunt resistance is decreased making the
technique compatible only with high quality (low pits density) Si
wafers;
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it is not compatible with large-scale manufacturing due to the
difficulty of maintaining uniform plasma over large areas;
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it introduces an additional (and very expensive) process step in the
fabrication of solar cells.
(c) RTWCG SiOX Technique:
During the growth of our RTWCG SiOX
antireflection film, a certain thickness (from 0.1
to 0.3 microns) of the emitter's large defect density surface is etched
off from the areas between the front screen-printed collection grid
lines. Consequently, the SE is formed simultaneously with the growth of
our SiOX antireflection coating. This new selective emitter concept,
which has been successfully tested both on single crystal and
production-type multicrystalline large area Si solar cells, is by far the biggest
contributor to our efficiency gain.
Reasons this RTWCG SiOX/SE low cost selective emitter (SE) technique
will be implemented by most solar cell manufacturers once further
developed:
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This is the only known low cost technique that works with both c-Si, and
mc-Si cells. It has been tested with good results both for single
crystal and multicrystalline Si solar cells.
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It is a room temperature process.
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The SE is introduced during the growth of the SiOX
film. No additional steps are required.
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Large volume can easily be accomplished.
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SiOX coating (that includes the SE step),
only requires 30 seconds to 1 minute growth time (back etch) depending
on the SiOX thickness and SiOX solution growth formulation.
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The RTWCG SiOX process is cheaper than any other
techniques.
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The SiOX growth/SE formation is compatible with front grid contacts:
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After the SiOX growth, and SE formation, our results show that the
series resistance (Rs) actually decreases rather significantly.
Antagonistically, the series resistance of other SE techniques constantly
increases (e.g. Ruby's).
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After the etch back, the resulting surfaces are
very smooth. Therefore, no significant decrease in the shunt resistance
(Rsh) has been observed, as is the case when using plasma etch
techniques. In fact the shunt resistance actually increased in a number
of cases.
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The best proof for the aforementioned finding is that by using the
SiOX ARC/SE process, the fill factor (FF) either dropped trivially or
was even slightly larger. Antagonistically, by using the plasma etch SE
formation there is a striking and continuous FF decrease. The FF decline
after the SE step is expected due to a higher sheet resistivity (Rsheet)
and normally results from a thinned down emitter. But just the SE
process’ emitter thinning cannot fully explain the FF’s drastic drop.
When using the plasma etch SE formation, other factors contribute to the
FF drop. These other factors don’t seem to occur when using the SiOX
ARC/SE process.
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The RTWCG SiOX growth/SE process requires just a
low cost chemical bench that is simple to maintain and can be operate by
any trained technician. The SiN growth and SE back etch processes
require expensive equipment and Ph.D. level personnel to exploit and
maintain them.
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Compared to conventional cells (coated with CVD
SiN antireflection coatings) that use lower diffused temperature to form the emitter, our
process uses a slightly higher diffusion temperature, at no significant
diffusion cost increase. The improved "gettering effect" will
make possible a higher degree of bulk passivation during diffusion,
which partially compensates for the high temperature CVD SiN ARC (see
below) having the additional hydrogen bulk passivation capability.
Selected Prior Art, SE
References
3. Surface SiOX Texturing:
Using an additional room temperature wet chemical process, we have
evidence that within 10 to 15 seconds the surface of the SiOX film (that
is originally very smooth), can be textured. This novel surface oxide texturing
(OT) concept will further increase the efficiency gain by further
reducing the reflectivity of our SiOX films, and increasing the
collection efficiency of the diffused portion of the Sun's rays. Our
first experiments have shown that by slightly altering the formulation
of the SiOX growth solutions, in-situ SiOX ST might be possible during
the RTWCG SiOX growth/SE formation.
4. Cost Comparison Between CVD SiNx and RTWCG SiOX ARC's:
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Even without the SE, the (i) high capital cost,
(ii) high maintenance associated costs, and (iii) high energy
consumption costs of the CVD SiN technique makes it a lot more expensive
than the RTWCG SiOX technique.
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The growth of CVD SiN films takes 30 minutes to 1
hour, compared to up to 1 minute using the RTWCG SiOX films.
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From to the two bullets above (#2, and #3) it
becomes obvious that by using the RTWCG process, the same floor
space (or less) can coat 30 times more cell area per year.
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CVD systems require complex maintenance
efforts leading to significant downturn time, but since the RTWCG
process utilizes only a very simple chemical bench the downturn time is
drastically decreased.
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The additional plasma equipment necessary for SE creation
doubles the already high cost of the CVD SiN ARC deposition, making the
process completely prohibitive. By comparison, the SE creation is
consequential to the RTWCG process and requires no added expense.
5. Conclusion:
We believe that the RTWCG SiOX ARC's can replace the conventional ARC techniques:
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With one or at most two simple and low-cost process steps, the RTWCG ARC/SE/OT technique,
can achieve all of Green's high efficiency PERL cell functional features
(good surface passivation, ultra-low reflectivity, some bulk
passivation, selective emitter, and surface oxide texturing) without the
PERL's prohibitive high cost. The RTWCG SiOX antireflection coating increases Si solar cell
efficiency by at least 30% (compared with TiO coated
cells), and by more than 20% compared to SiN coated cells (that do not employ
the SE). By using the SiOX ARC/SE the achievable efficiency of ordinary production c-Si solar
cells should be above 19%, and that of mc-Si cells above 17%.
Furthermore, by using the low-cost RTWCG SiOX ARC/SE/OT novel cell
structure the expected achievable efficiency of ordinary production
c-Si solar cells is 21%, and above 18% for mc-Si cells.
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Unlike the use of solar cells for space applications, large scale
terrestrial solar cell implementation will require lower peak Watt
costs, and low energy consumption during cell fabrication. The RTWCG
antireflection coating
technology is uniquely able to maximize the total lifetime energy delivered
by a solar cell over the total energy consumed to
produce it.
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